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| EMIF03-SIM02F2 3-line IPADTM, EMI filter including ESD protection Features EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Lead-free package Very low PCB space consuming: 1.42 mm x 1.42 mm Very thin package: 0.65 mm High efficiency in ESD suppression High reliability offered by monolithic integration High reduction of parasitic elements through integration and wafer level packaging Figure 1. Pin configuration (bump side) 3 RST in Flip Chip (8 bumps) 2 RST ext 1 A CLK ext Complies with the following standards IEC 61000-4-2, Level 4 on external and Vcc pins: - 15 kV (air discharge) - 8 kV (contact discharge) IEC 61000-4-2, Level 1 on internal pins: - 2 kV (air discharge) - 2 kV (contact discharge) MIL STD 883E - Method 3015-6 Class 3 Figure 2. VCC CLK in Gnd B C Data in VCC Data ext Configuration 100 RST in R1 47 RST ext Applications EMI filtering and ESD protection for: CLK in R2 100 Data in R3 CLK ext Data ext SIM Interface (Subscriber Identify Module) UIM Interface (Universal Identify Module) GND Cline = 20pF max. Description The EMIF03-SIM02F2 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference.The EMIF03 Flip Chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents damage to the application when subjected to ESD surges up 15kV. April 2008 TM: IPAD is a trademark of STMicroelectronics. Rev 6 1/8 www.st.com 8 Characteristics EMIF03-SIM02F2 1 Characteristics Table 1. Symbol Absolute maximum ratings (Tamb = 25 C) Parameter and test conditions Internal pins (A3, B3, C3): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge External pins (A2, B1, C2, C1): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge Maximum junction temperature Operating temperature range Storage temperature range Value Unit VPP 2 2 15 8 125 -40 to +85 -55 to 150 kV Tj Top Tstg C C C Table 2. Symbol VBR IRM VRM VCL Rd IPP RI/O Cline Symbol VBR IRM Rd R1, R3 R2 Cline Electrical characteristics (Tamb = 25 C) Parameters Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage VCL VBR VRM VF IRM IR V I IF Dynamic impedance Peak pulse current Series resistance between Input & Output Input capacitance per line Test conditions IR = 1 mA VRM = 3V Min 6 IPP Typ Max 20 0.2 Unit V A 1.5 Tolerance 20% Tolerance 20% @ 0V 100 47 20 pF 2/8 EMIF03-SIM02F2 Characteristics Figure 3. S21 (dB) attenuation measurement Figure 4. (A2-A3 line) EMIF03-SIM02F2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 0.00 S21 (dB) attenuation measurement (B1-B3 line) EMIF03-SIM02F2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 0.00 dB dB -10.00 -10.00 -20.00 -20.00 -30.00 -30.00 -40.00 100.0k 1.0M A2/A3 Line 10.0M f/Hz 100.0M 1.0G -40.00 100.0k 1.0M B1/B3 line 10.0M f/Hz 100.0M 1.0G Figure 5. S21 (dB) attenuation measurement Figure 6. (C1-C3 line) EMIF03-SIM02F2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 0.00 dB -10.00 -20.00 Analog crosstalk measurements EMIF03-SIM02F2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 0.00 dB -10.00 -30.00 -40.00 -20.00 -50.00 -60.00 -70.00 -30.00 -80.00 -90.00 -40.00 100.0k 1.0M C1/C3 line 10.0M f/Hz 100.0M 1.0G -100.00 100.0k 1.0M Xtalk A2/B3 10.0M f/Hz 100.0M 1.0G Figure 7. Voltages when IEC61000-4-2 (+15 kV air discharge) applied to external pin Figure 8. Voltages when IEC61000-4-2 (-15 kV air discharge) applied to external pin Vexternal : 10V/d Vexternal : 5V/d Vinternal : 10V/d 100ns/d Vinternal : 5V/d 100ns/d 3/8 Application information Figure 9. EMIF03-SIM02F2 Line capacitance versus reverse applied voltage (typical) C(pF) 20. 00 16. 00 12. 00 8. 00 4. 00 VR(V) 0. 00 0 1 2 3 4 5 2 Application information Figure 10. Aplac model Lbump Rbump a2 Cbump Rsub bulk Lbump Rbump b3 Cbump Rsub bulk LbumpRbump c1 Rsub Cbump bulk Dext1 0.25 0.28 Dext2 Dext1 0.25 Bulk Dint1 Dint2 0.29 0.31 0.29 Dint1 bulk Rsub Cbump Rsub Cbump bulk 100 Rbump Lbump c3 Rsub Cbump bulk 47 Rbump Lbump b1 100 Rbump Lbump a3 Lbump Ls 100m Rbump a2 Lgnd Port1 50 Cgnd Rgnd Port2 50 a3 100m Ls Figure 11. Aplac parameters Ls 950pH Rs 150m Cext1 15pF Cint1 4.5pF Cext2 14pF Cint2 4pF Rbump 20m Lbump 50pH Cbump 0.15pF Rgnd 500m Lgnd 50pH Cgnd 0.15pF Rsub 100m Model Dint1 BV=15 CJO=Cint1 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Model Dext1 BV=15 CJO=Cext1 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Model Dint2 BV=15 CJO=Cint2 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Model Dext2 BV=15 CJO=Cext2 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n 4/8 EMIF03-SIM02F2 Ordering information scheme 3 Ordering information scheme Figure 12. Ordering information scheme EMIF EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip Chip x = 2: lead-free pitch = 500 m, bump = 315 m yy - xxx zz Fx 4 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 13. Package dimensions 500 m 50 650 m 65 315 m 50 500 m 50 1.39 mm 30 m 195 m 195 m 1.39 mm 30 m 5/8 Ordering information EMIF03-SIM02F2 Figure 14. Footprint Figure 15. Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter: 250 m recommended, 300 m max E Solder stencil opening: 330 m Solder mask opening recommendation: 340 m min for 315 m copper pad diameter xxz y ww Figure 16. Flip Chip tape and reel specification Dot identifying Pin A1 location 4 0.1 O 1.5 0.1 1.75 0.1 3.5 0.1 1.52 0.73 0.05 All dimensions in mm 8 0.3 1.52 STE STE STE xxz yww User direction of unreeling xxz yww xxz yww 4 0.1 Note: More information isavailable in the application notes: AN1235:"Flip Chip: Package description and recommendations for use" AN1751: "EMI filters: Recommendations and measurements" 5 Ordering information Table 3. Ordering information Marking GJ Package Flip Chip Weight 2.65 mg Base qty 5000 Delivery mode Tape and reel 7" Order code EMIF03-SIM02F2 6/8 EMIF03-SIM02F2 Revision history 6 Revision history Table 4. Date 08-Oct-2004 20-Oct-2004 25-Mar-2005 13-Jun-2005 12-Sep-2005 24-Apr-2008 Document revision history Revision 1 2 3 4 5 6 First issue. Minor layout update. Figure 1 on page 1: pin configuration definitions changed from RST out, CLK out and Data out to RST ext, CLK ext and Data ext. Titles in Figures 7 and 8 changed - No technical data changed "out" changed to "ext" in Figure 2. Updated ECOPACK statement. Updated Figure 12, Figure 13, Figure 14, Figure 15 and Figure 16. Reformatted to current standards. Changes 7/8 EMIF03-SIM02F2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZE REPRESENTATIVE OF ST, ST PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS, WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 8/8 |
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